Cartridges

THE SUPERCARTRIDGE

Copyright (c)1984 Ken Roser

OSS has recently introduced BASIC XL and ACTION in a cartridge referred to as the supercartridge. This article will explain the advantages of using such a cartridge and describe in detail how the cartridge works.

The advantage of using the supercartridge hardware is that one can have 16K (K = 1 kilobyte) of ROM and 8K of RAM all within only 8K of memory address space. What this means is more of your precious memory is available for your programs and data instead of being used up by a 16K cartridge or a large applications program or interpreter.

This efficient use of memory resources is accomplished by selectively activating 4K segments of two 2764 (8 Kilobyte x 8 bit) EPROMS. Only two 4K banks out of the possible 4 can be selected at one time.

There are 2 EPROMS located on the supercartridge board that I have designated ROM A and ROM B. The upper 4K of ROM A will always reside in the $B000-$BFFF address range when the RAM is deselected. The other 4K banks (ROM B upper, ROM B lower, and ROM A lower) can selectively be mapped into the $A000-$AFFF address range. Optionally all the ROMs can be deselected and the computer's existing RAM can be accessed in the $A000-$BFFF memory range.

The bank switching is accomplished by writing to a memory address within the range $D500-$D5FF. When this write occurs, address bits A0 thru A3 are latched into a 4 bit register located on the cartridge. The status of each bit determines the current mapping configuration to be put into effect.

The following tables are used to show what each address bit actually does in the cartridge. A0 always controls the selection of ROM A. A1 always controls the selection of ROM B. A2 selects which half of ROM B is used when it is selected. A3 selects/deselects RAM. BIT A0 This table shows what portion of ROM A will be used in each address range dependent on the state of A0.

                        A000-AFFF      B000-BFFF
                     _____________________________________
                    |                  |                  |
               A0=0 |   nothing        |   ROM A upper    |
                    |__________________|__________________|
                    |                  |                  |
               A0=1 |   ROM A lower    |   ROM A upper    |
                    |__________________|__________________|
 
BIT A1 This table shows when ROM B is selected. The half of ROM B used is determined by A2.
                         A000-AFFF         B000-BFFF
                     _____________________________________
                    :                  :                  :
               A1=0 : ROM B select     :   nothing        :
                    :__________________:__________________:
                    :                  :                  :
               A1=1 :   nothing        :   nothing        :
                    :__________________:__________________:

BIT A2 This table shows which half of ROM B is used when it is selected.
                           ____________________________
                          :                            :
                     A2=0 : Lower 1/2 of ROM B (A12=0) :
                          :____________________________:
                          :                            :
                     A2=1 : Upper 1/2 of ROM B (A12=1) :
                          :____________________________:
BIT A3 This table shows the effect of A3.
                          ____________________________
                         :                            :
                    A3=0 : ROM Selected/Ram deselected:
                         :____________________________:
                         :                            
                    A3=1 : RAM selected/ROM deselected:
                         :____________________________:
Make note that some of these options can not be selected simultaneously. For example, an illegal option would be A0=1 and A1=0. In that case both ROM A lower and ROM B would be selected for the $A000-$AFFF address range.

Possible Valid Configurations:

These diagrams represent the segments of ROM and/or RAM that will be activated when the address shown is written to.

                        __________            __________
                  $A000:          :     $A000:          :
                       :   ROM B  :          : nothing  :
                       :   lower  :          : selected :
                  $AFFF:__________:     $AFFF:__________:
                  $B000:          :     $B000:          :
                       :   ROM A  :          :   ROM A  :
                       :   upper  :          :   upper  :
                  $BFFF:__________:     $BFFF:__________:
                        A0=0                  A0=0
                        A1=0                  A1=1
                        A2=0                  A2=0,1
                        A3=0                  A3=0

                        $D500                 $D502 or $D506


                        __________           ___________
                  $A000:          :    $A000:          :
                       :   ROM A  :         :  ROM B   :
                       :   lower  :         :  upper   :
                  $AFFF:__________:    $AFFF:__________:
                  $B000:          :    $B000:          :
                       :   ROM A  :         :   ROM A  :
                       :   upper  :         :   upper  :
                  $BFFF:__________:    $BFFF:__________:
                        A0=1                 A0=0
                        A1=1                 A1=0
                        A2=0,1               A2=1
                        A3=0                 A3=0

                        $D503 or $D507       $D504



                                  __________
                            $A000:          :
                                 :    RAM   :
                                 :          :
                            $AFFF:__________:
                            $B000:          :
                                 :    RAM   :
                                 :          :
                            $BFFF:__________:
                                  A0=0,1
                                  A1=0,1
                                  A2=0,1
                                  A3=1

                                  $D508-$D50F
If one was to combine the above configurations into one diagram, you would get something like this representing the possible configurations:
                       _______________________________________
                 $A000:             :             :           :
                      :    ROM A    :    ROM B    :    ROM B  :
                      :    lower    :    lower    :    upper  :
                 $AFFF:_____________:_____________:___________:
                 $B000:                                       :
                      :                   ROM                 :
                      :                  upper                :
                 $BFFF:_______________________________________:
When ROM is swapped out for RAM, the entire range $A000-$BFFF no longer has ROM. The ROM can only be swapped out in the entire 8K range.

In the ACTION! cartridge ROM A is designated MA and ROM B is designated LI.

In the BASIC XL cartridge ROM A is designated as BAS-H and ROM B is designated as BAS-L.


                              CIRCUIT BOARD LAYOUT
                       _________________________________
                      :                    ___________  :
                      : :        ###_     :           : :
                      : #  __________     D  74LS02   : :
                      : # :          :    :___________: :
                      : # D 74LS175  :     ___________  :
                      : : :__________:    :           : :
                      :                   D  74LS00   : :
                      :         -#- -#-   :___________: :
                      :                                 :
                      :   ____________   ____________   :
                      :  :1         28: :1         28:  :
                      :  :2         27: :2         27:  :
                      :  :3         26: :3         26:  :
                      :  :4         25: :4         25:  :
                      :  :5         24: :5         24:  :
                      :  :6         23: :6         23:  :
                      :  :7  ROM B  22: :7  ROM A  22:  :
                      :  :8         21: :8         21:  :
                      :  :9         20: :9         20:  :
                      :  :10        19: :10        19:  :
                      :  :11        18: :11        18:  :
                      :  :12        17: :12        17:  :
                      :  :13        16: :13        16:  :
                      :  :14        15: :14        15:  :
                      :  :____________: :____________:  :
                      :                                 :
                      :_                               _:
                        :                             :
                        :0 0 0 0 0 0 0 0 0 1 1 1 1 1 1:
                        :1 2 3 4 5 6 7 8 9 0 1 2 3 4 5:
                        :_____________________________:

                             COMPONENT SIDE PINOUT

                      :                                 :
                      :_                               _:
                        :                             :
                        :                             :
                        :A B C D E F H J K L M N P R S:
                        :_____________________________:

                               FOIL SIDE PINOUT
. Back (c) 1998-2004 Jindroush Last modified: Sun Nov 26 12:18:44 2000